371 Commits
Author SHA1 Message Date
Stack-1 f725ccdeeb Merge branch 'development' into communication_v2
# Conflicts:
#	base/CMakeLists.txt
#	base/comm/internals/psi_cswapdata.F90
#	base/comm/internals/psi_dswapdata.F90
#	base/comm/internals/psi_iswapdata.F90
#	base/comm/internals/psi_lswapdata.F90
#	base/comm/internals/psi_sswapdata.F90
#	base/comm/internals/psi_zswapdata.F90
#	base/modules/Makefile
#	base/modules/comm/psb_i2_comm_mod.f90
#	base/modules/comm/psi_i2_comm_v_mod.f90
#	base/modules/serial/psb_i2_base_vect_mod.F90
#	test/computational_routines/spmm/spmm_checker
2026-06-04 22:31:01 +02:00
Stack-1 2c65c50593 [ADD] Added single point of comm_scheme selection on descriptor 2026-05-27 15:24:43 +02:00
Stack-1 4b8e4dd4a3 [UPDATE] Refactor after template update for RMA routines 2026-05-26 13:14:19 +02:00
Stack-1 d231efe35a [FIX] Modified spmv test to check overlap 2026-05-12 12:32:03 +02:00
sfilippone 19ce4a0942 Fix multivect assembly and comments in base_vect 2026-04-29 14:06:35 +02:00
sfilippone a223c7eaf3 Rebuild I2 supprot 2026-03-24 15:42:12 +01:00
Stack-1 461a6a325f [UPDATE] Removed work/aux buffer from vector routines that use psb_x_vect_type encapsulation for data exchange 2026-03-19 17:36:44 +01:00
fdurastante 1ee1b83341 Added routine to extract single element from sparse matrix 2026-03-19 14:58:00 +01:00
sfilippone d2fba9e952 Fix licensing text 2026-03-18 14:49:55 +01:00
sfilippone bdee97e991 Fix use of MPI communicator 2026-03-12 17:30:21 +01:00
Salvatore Filippone 3d92668973 Change name of desc%get_list into desc%get_list_p 2026-02-12 12:54:50 +01:00
sfilippone ac5512974b Fix vector allocation etc. 2026-01-13 16:57:06 +01:00
sfilippone 3337a12e59 Fix multivect handling 2026-01-13 15:26:11 +01:00
sfilippone c1ca1665e7 Fixes to vector status and build processing for dealii 2025-12-02 17:34:10 +01:00
sfilippone 0c84efb887 Working version with mods for building with dealii requests 2025-11-06 14:06:47 +01:00
sfilippone 98a6eba948 First round of changes for vector builds 2025-11-05 14:01:54 +01:00
sfilippone ed97717037 Change name of an error constant. 2025-10-08 12:54:59 +02:00
sfilippone dc25c789ef Fixes for Intel compilation take 2. To be completed. 2025-09-18 20:27:26 +02:00
sfilippone 07fa2323eb Fixes for IPK8 2025-06-01 20:56:11 +02:00
sfilippone b71459a38f Timings in SPINS 2025-05-15 09:40:27 +02:00
sfilippone ffcf0806df Fix descriptor init functions 2025-04-14 18:07:24 +02:00
sfilippone 6476428ccb Complete fix for hash_threshold 2025-04-04 09:38:29 +02:00
sfilippone d0c59af791 Realign SPINS 2025-04-03 17:55:51 +02:00
sfilippone 266611460f Switch off timings in DSPINS 2025-03-28 12:41:25 +01:00
Salvatore Filippone e811a8efeb Changes and measurements for SPINS/hash G2L_ins 2025-03-28 09:59:22 +01:00
Salvatore Filippone ce4cad2f7f Defined timings in spins, but switched off 2025-03-27 17:29:02 +01:00
sfilippone a3496d8cb5 Add error handling after CDALL in samples 2025-03-27 12:39:50 +01:00
sfilippone ecef7d8653 Improve communication and speed between cd_inloc and hash_init 2025-03-26 16:37:28 +01:00
sfilippone ea6c4181f7 Changed all defines with prefix PSB_ 2025-03-14 12:54:18 +01:00
sfilippone 9ccadf5b95 Fix use statements in new par_spspmm 2025-03-01 13:30:06 +01:00
sfilippone e282fb1a2a Silence more warnings/errors from INTEL 2025-03-01 12:44:32 +01:00
sfilippone 30810f804e Additional OpenMP tweaks, to be redesigned in the future. 2025-02-09 14:04:34 +01:00
sfilippone 772533b6f1 Avoid excessive OpenMP overhead in SPINS. Will have to be redesigned. 2025-01-23 15:38:05 +01:00
sfilippone aca1848401 New timings in CG 2024-04-17 13:53:23 +02:00
sfilippone 3aa3c795e9 Refactor assembly and cnv 2023-12-23 13:15:01 +01:00
sfilippone ae7fad95d4 Merge branch 'development' into non-diag 2023-11-07 18:02:55 +01:00
sfilippone a2788bdf0b New version with ND product 2023-11-07 13:39:44 +01:00
sfilippone def0635c53 More OMP directives in cd_inloc 2023-09-07 09:25:37 +02:00
sfilippone 347352fe1e Make spins work in OpenMP from either par or serial 2023-06-02 11:07:23 +02:00
sfilippone 1941affe7a Exposed error in AMG test when not parallelizing generation loop 2023-05-30 12:26:58 +02:00
sfilippone 7e5dc20e03 Define new options for BSRCH, clean interface 2023-04-27 13:05:46 +02:00
Salvatore Filippone 5bc02fb2e6 Take out redundant statements in SPINS 2023-04-21 08:55:20 +02:00
sfilippone 5a5712b4f0 Rely on CRITICAL inside G2L_INS implementation 2023-04-16 12:02:54 +02:00
sfilippone f068d73ef1 First working version 2023-04-16 11:30:09 +02:00
sfilippone 8459ea28f5 Modified matrix build procedures with OpenMP 2023-04-14 18:25:43 +02:00
sfilippone 0f1603a2e9 The current version of test/omp seems to be working. To be completed 2023-04-13 16:40:29 +02:00
Salvatore Filippone 86b8a261ef Fixed conversion bug, changed SPASB interface 2023-01-19 08:36:22 -05:00
Salvatore Filippone f09e25524e Create ECSR format and use it for A%AND 2023-01-18 09:17:49 -05:00
Salvatore Filippone 00cc83cde8 First version of AD/AND with memory duplication 2023-01-18 05:04:16 -05:00
Salvatore Filippone e8903bc28b Fix VL(:) initialization when CHECK_=.false. 2022-11-21 08:59:59 -05:00