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150 lines
4.0 KiB
Plaintext
150 lines
4.0 KiB
Plaintext
/*
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* spGPU - Sparse matrices on GPU library.
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*
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* Copyright (C) 2010 - 2012
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* Davide Barbieri - University of Rome Tor Vergata
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 3 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "cudadebug.h"
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#include "cudalang.h"
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#include "cuComplex.h"
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extern "C"
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{
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#include "core.h"
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#include "vector.h"
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int getGPUMultiProcessors();
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int getGPUMaxThreadsPerMP();
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//#include "cuda_util.h"
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}
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#include "debug.h"
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#define BLOCK_SIZE 512
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#if 1
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__global__ void spgpuZaxpby_krn(cuDoubleComplex *z, int n, cuDoubleComplex beta, cuDoubleComplex *y, cuDoubleComplex alpha, cuDoubleComplex* x)
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{
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int id = threadIdx.x + BLOCK_SIZE*blockIdx.x;
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unsigned int gridSize = blockDim.x * gridDim.x;
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if (cuDoubleComplex_isZero(beta)) {
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for ( ; id < n; id +=gridSize)
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//if (id,n)
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{
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// Since z, x and y are accessed with the same offset by the same thread,
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// and the write to z follows the x and y read, x, y and z can share the same base address (in-place computing).
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z[id] = cuCmul(alpha,x[id]);
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}
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} else {
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for ( ; id < n; id +=gridSize)
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//if (id,n)
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{
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z[id] = cuCfma(beta, y[id], cuCmul(alpha, x[id]));
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}
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}
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}
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void spgpuZaxpby(spgpuHandle_t handle,
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__device cuDoubleComplex *z,
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int n,
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cuDoubleComplex beta,
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__device cuDoubleComplex *y,
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cuDoubleComplex alpha,
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__device cuDoubleComplex* x)
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{
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int msize = (n+BLOCK_SIZE-1)/BLOCK_SIZE;
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int num_mp, max_threads_mp, num_blocks_mp, num_blocks;
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dim3 block(BLOCK_SIZE);
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num_mp = getGPUMultiProcessors();
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max_threads_mp = getGPUMaxThreadsPerMP();
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num_blocks_mp = max_threads_mp/BLOCK_SIZE;
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num_blocks = num_blocks_mp*num_mp;
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dim3 grid(num_blocks);
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spgpuZaxpby_krn<<<grid, block, 0, handle->currentStream>>>(z, n, beta, y, alpha, x);
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}
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#else
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__global__ void spgpuZaxpby_krn(cuDoubleComplex *z, int n, cuDoubleComplex beta, cuDoubleComplex *y, cuDoubleComplex alpha, cuDoubleComplex* x)
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{
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int id = threadIdx.x + BLOCK_SIZE*blockIdx.x;
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if (id < n)
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{
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// Since z, x and y are accessed with the same offset by the same thread,
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// and the write to z follows the x and y read, x, y and z can share the same base address (in-place computing).
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if (cuDoubleComplex_isZero(beta))
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z[id] = cuCmul(alpha,x[id]);
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else
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z[id] = cuCfma(alpha, x[id], cuCmul(beta,y[id]));
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}
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}
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void spgpuZaxpby_(spgpuHandle_t handle,
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__device cuDoubleComplex *z,
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int n,
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cuDoubleComplex beta,
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__device cuDoubleComplex *y,
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cuDoubleComplex alpha,
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__device cuDoubleComplex* x)
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{
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int msize = (n+BLOCK_SIZE-1)/BLOCK_SIZE;
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dim3 block(BLOCK_SIZE);
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dim3 grid(msize);
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spgpuZaxpby_krn<<<grid, block, 0, handle->currentStream>>>(z, n, beta, y, alpha, x);
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}
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void spgpuZaxpby(spgpuHandle_t handle,
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__device cuDoubleComplex *z,
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int n,
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cuDoubleComplex beta,
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__device cuDoubleComplex *y,
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cuDoubleComplex alpha,
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__device cuDoubleComplex* x)
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{
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int maxNForACall = max(handle->maxGridSizeX, BLOCK_SIZE*handle->maxGridSizeX);
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while (n > maxNForACall) //managing large vectors
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{
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spgpuZaxpby_(handle, z, maxNForACall, beta, y, alpha, x);
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x = x + maxNForACall;
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y = y + maxNForACall;
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z = z + maxNForACall;
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n -= maxNForACall;
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}
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spgpuZaxpby_(handle, z, n, beta, y, alpha, x);
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cudaCheckError("CUDA error on daxpby");
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}
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#endif
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void spgpuZmaxpby(spgpuHandle_t handle,
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__device cuDoubleComplex *z,
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int n,
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cuDoubleComplex beta,
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__device cuDoubleComplex *y,
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cuDoubleComplex alpha,
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__device cuDoubleComplex* x,
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int count, int pitch)
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{
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for (int i=0; i<count; i++)
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spgpuZaxpby(handle, z+pitch*i, n, beta, y+pitch*i, alpha, x+pitch*i);
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}
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